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pal16l8am, pal16l8a-2m, pal16r4am, pal16r4a-2m pal16r6am, pal16r6a-2m, pal16r8am, pal16r8a-2m standard high-speed pal ? circuits srps016 d2705, february 1984 revised march 1992 post office box 655303 ? dallas, texas 75265 copyright ? 1992, texas instruments incorporated 1 production data information is current as of publication date. products conform to specifications per the terms of texas instruments standard warranty. production processing does not necessarily include testing of all parameters. ? choice of operating speeds high-speed, a devices . . . 25 mhz min half-power, a-2 devices . . . 16 mhz min ? choice of input/output configuration ? package options include both ceramic dip and chip carrier in addition to ceramic flat package device i inputs 3-state o outputs registered q outputs i/o port s pal16l8 10 2 0 6 pal16r4 8 0 4 (3-state buffers) 4 pal16r6 8 0 6 (3-state buffers) 2 pal16r8 8 0 8 (3-state buffers) 0 description these programmable array logic devices feature high speed and a choice of either standard or half-power devices. they combine advanced low-power schottky technology with proven titanium-tungsten fuses. these devices will provide reliable, high-performance substitutes for conventional ttl logic. their easy programmability allow for quick design of ocustomo functions and typically results in a more compact circuit board. in addition, chip carriers are available for further reduction in board space. the half-power versions offer a choice of operating frequency, switching speeds, and power dissipation. in many cases, these half-power devices can result in significant power reduction from an overall system level. the pal16' m series is characterized for operation over the full military temperature range of 55 c to 125 c. pal is a registered trademark of advanced micro devices inc. 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 i i i i i i i i i gnd v cc o i/o i/o i/o i/o i/o i/o o i pal16l8 ' j or w package (top view) 3 2 1 20 19 910111213 4 5 6 7 8 18 17 16 15 14 i/o i/o i/o i/o i/o i i i i i pal16l8 ' fk package (top view) i i i o i/o o i gnd i v cc
pal16r4am, pal16r4a-2m, pal16r6am, pal16r6a-2m, pal16r8am, pal16r8a-2m standard high-speed pal ? circuits srps016 d2705, february 1984 revised march 1992 post office box 655303 ? dallas, texas 75265 2 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 clk i i i i i i i i gnd v cc i/o i/o q q q q i/o i/o oe (top view) pal16r4 ' j or w package 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 clk i i i i i i i i gnd v cc i/o q q q q q q i/o oe (top view) pal16r6 ' j or w package 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 clk i i i i i i i i gnd v cc q q q q q q q q oe (top view) pal16r8 ' j or w package i i clk i/o i/o i/o i gnd v cc oe 3 2 1 20 19 910111213 4 5 6 7 8 18 17 16 15 14 i/o q q q q i i i i i (top view) pal16r4 ' fk package i i clk i/o q i/o i gnd v cc 3 2 1 20 19 910111213 4 5 6 7 8 18 17 16 15 14 q q q q q i i i i i (top view) oe pal16r6 ' fk package i i clk q q q i gnd v cc oe 3 2 1 20 19 910111213 4 5 6 7 8 18 17 16 15 14 q q q q q i i i i i (top view) pal16r8 ' fk package
pal16l8am, pal16l8a-2m, pal16r4am, pal16r4a-2m standard high-speed pal ? circuits srps016 d2705, february 1984 revised march 1992 post office box 655303 ? dallas, texas 75265 3 functional block diagrams (positive logic) denotes fused inputs pal16l8am pal16l8a-2m pal16r4am pal16r4a-2m o o i/o i/o i/o i/o i/o i/o i en 1 & 32 x 64 10 16 16 6 7 7 7 7 7 7 7 7 6 16 x q i/o i/o i/o i/o i en 816 16 4 7 7 7 8 8 8 7 4 16 x 1 & 32 x 64 1 8 q q q 4 1d i = 0 2 clk c1 en 2 oe 4
pal16r6am, pal16r6a-2m, pal16r8am, pal16r8a-2m standard high-speed pal ? circuits srps016 d2705, february 1984 revised march 1992 post office box 655303 ? dallas, texas 75265 4 functional block diagrams (positive logic) denotes fused inputs pal16r6am pal16r6a-2m pal16r8am pal16r8a-2m q i/o i/o i en 816 16 2 7 8 8 8 7 2 16 x 1 & 32 x 64 1 8 q q q 6 1d i = 0 2 clk c1 en 2 oe 6 8 q 8 q q i 816 16 8 8 8 8 8 16 x 8 q q q 1d i = 0 2 clk c1 en 2 8 q 8 q & 32 x 64 1 oe 8 q 8 q
0 4 8 12 16 20 24 28 31 i 2 i 3 i 4 i 5 i 6 i 7 i 8 i 9 o 19 i/o 18 i/o 17 i/o 16 i/o 15 i/o 14 i/o 13 o 12 i 11 increment i 1 fuse number = first fuse number + increment 0 32 64 96 128 160 192 224 256 288 320 352 384 416 448 480 512 544 576 608 640 672 704 736 768 800 832 864 896 928 960 992 1024 1056 1088 1120 1152 1184 1216 1248 1280 1312 1344 1376 1408 1440 1472 1504 1536 1568 1600 1632 1664 1696 1728 1760 1792 1824 1856 1888 1920 1952 1984 2016 first fuse numbers pal16l8am, pal16l8a-2m standard high-speed pal ? circuits srps016 d2705, february 1984 revised march 1992 post office box 655303 ? dallas, texas 75265 5 logic diagram (positive logic)
0 48 12 16 20 24 28 31 i 2 i 3 i 4 i 5 i 6 i 7 i 8 i 9 i/o 19 i/o 18 q 17 q 16 q 15 q 14 i/o 13 i/o 12 11 increment clk 1 fuse number = first fuse number + increment 0 32 64 96 128 160 192 224 256 288 320 352 384 416 448 480 512 544 576 608 640 672 704 736 768 800 832 864 896 928 960 992 1024 1056 1088 1120 1152 1184 1216 1248 1280 1312 1344 1376 1408 1440 1472 1504 1536 1568 1600 1632 1664 1696 1728 1760 1792 1824 1856 1888 1920 1952 1984 2016 first fuse numbers c1 1d i = 0 c1 1d i = 0 c1 1d i = 0 c1 1d i = 0 oe pal16r4am, pal16r4a-2m standard high-speed pal ? circuits srps016 d2705, february 1984 revised march 1992 post office box 655303 ? dallas, texas 75265 6 logic diagram (positive logic)
0 4 8 12 16 20 24 28 31 i 2 i 3 i 4 i 5 i 6 i 7 i 8 i 9 i/o 19 q 17 q 16 q 15 q 14 i/o 12 11 increment clk 1 fuse number = first fuse number + increment 0 32 64 96 128 160 192 224 256 288 320 352 384 416 448 480 512 544 576 608 640 672 704 736 768 800 832 864 896 928 960 992 1024 1056 1088 1120 1152 1184 1216 1248 1280 1312 1344 1376 1408 1440 1472 1504 1536 1568 1600 1632 1664 1696 1728 1760 1792 1824 1856 1888 1920 1952 1984 2016 first fuse numbers c1 1d i = 0 c1 1d i = 0 c1 1d i = 0 c1 1d i = 0 oe q 18 c1 1d i = 0 q 13 c1 1d i = 0 pal16r6am, pal16r6a-2m standard high-speed pal ? circuits srps016 d2705, february 1984 revised march 1992 post office box 655303 ? dallas, texas 75265 7 logic diagram (positive logic)
0 4 8 12 16 20 24 28 31 i 2 i 3 i 4 i 5 i 6 i 7 i 8 i 9 q 17 q 16 q 15 q 14 11 increment clk 1 fuse number = first fuse number + increment 0 32 64 96 128 160 192 224 256 288 320 352 384 416 448 480 512 544 576 608 640 672 704 736 768 800 832 864 896 928 960 992 1024 1056 1088 1120 1152 1184 1216 1248 1280 1312 1344 1376 1408 1440 1472 1504 1536 1568 1600 1632 1664 1696 1728 1760 1792 1824 1856 1888 1920 1952 1984 2016 first fuse numbers c1 1d i = 0 c1 1d i = 0 c1 1d i = 0 c1 1d i = 0 oe q 18 c1 1d i = 0 q 13 c1 1d i = 0 q 19 c1 1d i = 0 q 12 c1 1d i = 0 pal16r8am, pal16r8a-2m standard high-speed pal ? circuits srps016 d2705, february 1984 revised march 1992 post office box 655303 ? dallas, texas 75265 8 logic diagram (positive logic)
pal16l8am, pal16l8a-2m, pal16r4am, pal16r4a-2m pal16r6am, pal16r6a-2m, pal16r8am, pal16r8a-2m standard high-speed pal ? circuits srps016 d2705, february 1984 revised march 1992 post office box 655303 ? dallas, texas 75265 9 programming information texas instruments programmable logic devices can be programmed using widely available software and inexpensive device programmers. complete programming specifications, algorithms, and the latest information on hardware, software, and firmware are available upon request. information on programmers capable of programming texas instruments programmable logic is also available, upon request, from the nearest ti field sales office, local authorized ti distributor, or by calling texas instruments at (214) 997-5666. absolute maximum ratings over operating free-air temperature range (unless otherwise noted) supply voltage, v cc (see note 1) 7 v . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . input voltage (see note 1) 5.5 v . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . voltage applied to disabled output (see note 1) 5.5 v . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . operating free-air temperature range 55 c to 125 c . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . storage temperature range 65 c to 150 c . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . note 1: these ratings apply except for programming pins during a programming cycle. recommended operating conditions min nom max unit v cc supply voltage 4.5 5 5.5 v v ih high-level input voltage 2 5.5 v v il low-level input voltage 0.8 v i oh high-level output current 2 ma i ol low-level output current 12 ma t a operating free-air temperature 55 25 125 c
m a m a m a ma v cc = 5.5 v, v o = 2.7 v v cc = 5.5 v, v o = 0.4 v v cc = 5.5 v, v i = 2.7 v v cc = 5.5 v, v i = 0.4 v i ozh i ozl i ih i il ns pulse duration (see note 2) t w pal16l8am, pal16r4am, pal16r6am, pal16r8am standard high-speed pal ? circuits srps016 d2705, february 1984 revised march 1992 post office box 655303 ? dallas, texas 75265 10 electrical characteristics over recommended operating free-air temperature range parameter test conditions min typ 2 max unit v ik v cc = 4.5 v, i i = 18 ma 1.5 v v oh v cc = 4.5 v, i oh = 2 ma 2.4 3.2 v v ol v cc = 4.5 v, i ol = 12 ma 0.25 0.4 v outputs 20 i/o ports 100 outputs 20 i/o ports 100 i i v cc = 5.5 v, v i = 5.5 v 0.2 ma i/o ports 100 all others 25 oe input 0.2 all others 0.1 i os 3 v cc = 5.5 v, v o = 0.5 v 30 250 ma i cc v cc = 5.5 v, v i = 0, outputs open 75 180 ma timing requirements min max unit f clock clock frequency 0 25 mhz clock high 15 clock low 20 t su setup time, input or feedback before clk 25 ns t h hold time, input or feedback after clk 0 ns note 2: the total clock period of clock high and clock low must not exceed clock frequency, f clock . the minimum pulse durations specified are only for clock high or low, but not for both simultaneously. switching characteristics over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) parameter from (input) to (output) test condition min typ 2 max unit f max 25 45 mhz t pd i, i/o o, i/o 15 30 ns t pd clk q r1 = 390 w, 10 20 ns t en oe q r2 = 750 w, 15 25 ns t dis oe q see figure 1 10 25 ns t en i, i/o o, i/o 14 30 ns t dis i, i/o o, i/o 13 30 ns 2 all typical values are at v cc = 5 v, t a = 25 c. 3 not more than one output should be shorted at a time and the duration of the short circuit should not exceed one second. set v o at 0.5 v to avoid test equipment degradation.
m a m a m a ma v cc = 5.5 v, v o = 2.7 v v cc = 5.5 v, v o = 0.4 v v cc = 5.5 v, v i = 2.7 v v cc = 5.5 v, v i = 0.4 v i ozh i ozl i ih i il ns pulse duration (see note 2) t w pal16l8a-2m, pal16r4a-2m, pal16r6a-2m, pal16r8a-2m standard high-speed pal ? circuits srps016 d2705, february 1984 revised march 1992 post office box 655303 ? dallas, texas 75265 11 electrical characteristics over recommended operating free-air temperature range parameter test conditions min typ 2 max unit v ik v cc = 4.5 v, i i = 18 ma 1.5 v v oh v cc = 4.5 v, i oh = 2 ma 2.4 3.2 v v ol v cc = 4.5 v, i ol = 12 ma 0.25 0.4 v outputs 20 i/o ports 100 outputs 20 i/o ports 100 i i v cc = 5.5 v, v i = 5.5 v 0.2 ma i/o ports 100 all others 25 oe input 0.2 all others 0.1 i os 3 v cc = 5.5 v, v o = 0.5 v 30 250 ma i cc v cc = 5.5 v, v i = 0, outputs open 75 90 ma timing requirements min max unit f clock clock frequency 0 16 mhz clock high 25 clock low 25 t su setup time, input or feedback before clk 35 ns t h hold time, input or feedback after clk 0 ns note 2: the total clock period of clock high and clock low must not exceed clock frequency, f clock . the minimum pulse durations specified are only for clock high or low, but not for both simultaneously. switching characteristics over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) parameter from (input) to (output) test condition min typ 2 max unit f max 16 25 mhz t pd i, i/o o, i/o 25 40 ns t pd clk q r1 = 390 w, 11 25 ns t en oe q r2 = 750 w, 20 25 ns t dis oe q see figure 1 11 25 ns t en i, i/o o, i/o 25 40 ns t dis i, i/o o, i/o 25 35 ns 2 all typical values are at v cc = 5 v, t a = 25 c. 3 not more than one output should be shorted at a time and the duration of the short circuit should not exceed one second. set v o at 0.5 v to avoid test equipment degradation.
pal16l8am, pal16l8a-2m, pal16r4am, pal16r4a-2m pal16r6am, pal16r6a-2m, pal16r8am, pal16r8a-2m standard high-speed pal ? circuits srps016 d2705, february 1984 revised march 1992 post office box 655303 ? dallas, texas 75265 12 srps016 parameter measurement information t su s1 from output under test test point r2 c l (see note a) load circuit for 3-state outputs 3 v 0 1.5 v 1.5 v t h 1.5 v timing input data input input in-phase output out-of-phase output (see note d) t pd t pd t pd t pd voltage waveforms setup and hold times voltage waveforms propagation delay times v oh v oh v ol v ol 3 v 0 3 v 0 1.5 v 1.5 v 1.5 v 1.5 v t w high-level pulse low-level pulse output control (low-level enabling) waveform 1 s1 closed (see note b) waveform 2 s1 open (see note b) 1.5 v 1.5 v 3 v 0 3.3 v v ol v oh v oh 0.5 v 0 v t en t en t dis t dis voltage waveforms enable and disable times, 3-state outputs voltage waveforms pulse durations 1.5 v 1.5 v 1.5 v 1.5 v 1.5 v 1.5 v 1.5 v 1.5 v r1 3 v 3 v 0 0 v ol + 0.5 v 5 v notes: a. c l includes probe and jig capacitance and is 50 pf for t pd and t en , 5 pf for t dis . b. waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. c. all input pulses have the following characteristics: prr 10 mhz, t r and t f 2 ns, duty cycle = 50% d. when measuring propagation delay times of 3- state outputs, switch s1 is closed. e. equivalent loads may be used for testing. figure 1. load circuit and voltage waveforms
packaging information orderable device status (1) package type package drawing pins package qty eco plan (2) lead/ball finish msl peak temp (3) 81036072a active lccc fk 20 1 tbd call ti n / a for pkg type 8103607ra active cdip j 20 1 tbd call ti n / a for pkg type 8103607sa active cfp w 20 1 tbd call ti n / a for pkg type 81036082a active lccc fk 20 1 tbd call ti n / a for pkg type 8103608ra active cdip j 20 1 tbd call ti n / a for pkg type 8103608sa active cfp w 20 1 tbd call ti n / a for pkg type 81036092a active lccc fk 20 1 tbd call ti n / a for pkg type 8103609ra active cdip j 20 1 tbd call ti n / a for pkg type 8103609sa active cfp w 20 1 tbd call ti n / a for pkg type 81036102a active lccc fk 20 1 tbd call ti n / a for pkg type 8103610ra active cdip j 20 1 tbd call ti n / a for pkg type 8103610sa active cfp w 20 1 tbd call ti n / a for pkg type 81036112a active lccc fk 20 1 tbd call ti n / a for pkg type 8103611ra active cdip j 20 1 tbd call ti n / a for pkg type 8103611sa active cfp w 20 1 tbd call ti n / a for pkg type 81036122a active lccc fk 20 1 tbd call ti n / a for pkg type 8103612ra active cdip j 20 1 tbd call ti n / a for pkg type 8103612sa active cfp w 20 1 tbd call ti n / a for pkg type 81036132a active lccc fk 20 1 tbd call ti n / a for pkg type 8103613ra active cdip j 20 1 tbd call ti n / a for pkg type 8103613sa active cfp w 20 1 tbd call ti n / a for pkg type 81036142a active lccc fk 20 1 tbd call ti n / a for pkg type 8103614ra active cdip j 20 1 tbd call ti n / a for pkg type 8103614sa active cfp w 20 1 tbd call ti n / a for pkg type pal16l8a-2mfkb active lccc fk 20 1 tbd call ti n / a for pkg type pal16l8a-2mj active cdip j 20 1 tbd call ti n / a for pkg type pal16l8a-2mjb active cdip j 20 1 tbd call ti n / a for pkg type pal16l8a-2mwb active cfp w 20 1 tbd call ti n / a for pkg type pal16l8amfkb active lccc fk 20 1 tbd call ti n / a for pkg type pal16l8amj active cdip j 20 1 tbd call ti n / a for pkg type pal16l8amjb active cdip j 20 1 tbd call ti n / a for pkg type pal16l8amwb active cfp w 20 1 tbd call ti n / a for pkg type pal16r4a-2mfkb active lccc fk 20 1 tbd call ti n / a for pkg type pal16r4a-2mj active cdip j 20 1 tbd call ti n / a for pkg type pal16r4a-2mjb active cdip j 20 1 tbd call ti n / a for pkg type pal16r4a-2mwb active cfp w 20 1 tbd call ti n / a for pkg type pal16r4amfkb active lccc fk 20 1 tbd call ti n / a for pkg type pal16r4amj active cdip j 20 1 tbd call ti n / a for pkg type pal16r4amjb active cdip j 20 1 tbd call ti n / a for pkg type pal16r4amwb active cfp w 20 1 tbd call ti n / a for pkg type pal16r6a-2mfkb active lccc fk 20 1 tbd call ti n / a for pkg type pal16r6a-2mj active cdip j 20 1 tbd call ti n / a for pkg type package option addendum www.ti.com 12-jan-2006 addendum-page 1
orderable device status (1) package type package drawing pins package qty eco plan (2) lead/ball finish msl peak temp (3) pal16r6a-2mjb active cdip j 20 1 tbd call ti n / a for pkg type pal16r6a-2mwb active cfp w 20 1 tbd call ti n / a for pkg type pal16r6amfkb active lccc fk 20 1 tbd call ti n / a for pkg type pal16r6amj active cdip j 20 1 tbd call ti n / a for pkg type pal16r6amjb active cdip j 20 1 tbd call ti n / a for pkg type pal16r6amwb active cfp w 20 1 tbd call ti n / a for pkg type PAL16R8A-2MFKb active lccc fk 20 1 tbd call ti n / a for pkg type pal16r8a-2mj active cdip j 20 1 tbd call ti n / a for pkg type pal16r8a-2mjb active cdip j 20 1 tbd call ti n / a for pkg type pal16r8a-2mwb active cfp w 20 1 tbd call ti n / a for pkg type pal16r8amfkb active lccc fk 20 1 tbd call ti n / a for pkg type pal16r8amj active cdip j 20 1 tbd call ti n / a for pkg type pal16r8amjb active cdip j 20 1 tbd call ti n / a for pkg type pal16r8amwb active cfp w 20 1 tbd call ti n / a for pkg type (1) the marketing status values are defined as follows: active: product device recommended for new designs. lifebuy: ti has announced that the device will be discontinued, and a lifetime-buy period is in effect. nrnd: not recommended for new designs. device is in production to support existing customers, but ti does not recommend using this part in a new design. preview: device has been announced but is not in production. samples may or may not be available. obsolete: ti has discontinued the production of the device. (2) eco plan - the planned eco-friendly classification: pb-free (rohs), pb-free (rohs exempt), or green (rohs & no sb/br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. tbd: the pb-free/green conversion plan has not been defined. pb-free (rohs): ti's terms "lead-free" or "pb-free" mean semiconductor products that are compatible with the current rohs requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. where designed to be soldered at high temperatures, ti pb-free products are suitable for use in specified lead-free processes. pb-free (rohs exempt): this component has a rohs exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. the component is otherwise considered pb-free (rohs compatible) as defined above. green (rohs & no sb/br): ti defines "green" to mean pb-free (rohs compatible), and free of bromine (br) and antimony (sb) based flame retardants (br or sb do not exceed 0.1% by weight in homogeneous material) (3) msl, peak temp. -- the moisture sensitivity level rating according to the jedec industry standard classifications, and peak solder temperature. important information and disclaimer: the information provided on this page represents ti's knowledge and belief as of the date that it is provided. ti bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. efforts are underway to better integrate information from third parties. ti has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. ti and ti suppliers consider certain information to be proprietary, and thus cas numbers and other limited information may not be available for release. in no event shall ti's liability arising out of such information exceed the total purchase price of the ti part(s) at issue in this document sold by ti to customer on an annual basis. package option addendum www.ti.com 12-jan-2006 addendum-page 2

mechanical data mlcc006b october 1996 post office box 655303 ? dallas, texas 75265 fk (s-cqcc-n**) leadless ceramic chip carrier 4040140 / d 10/96 28 terminal shown b 0.358 (9,09) max (11,63) 0.560 (14,22) 0.560 0.458 0.858 (21,8) 1.063 (27,0) (14,22) a no. of min max 0.358 0.660 0.761 0.458 0.342 (8,69) min (11,23) (16,26) 0.640 0.739 0.442 (9,09) (11,63) (16,76) 0.962 1.165 (23,83) 0.938 (28,99) 1.141 (24,43) (29,59) (19,32) (18,78) ** 20 28 52 44 68 84 0.020 (0,51) terminals 0.080 (2,03) 0.064 (1,63) (7,80) 0.307 (10,31) 0.406 (12,58) 0.495 (12,58) 0.495 (21,6) 0.850 (26,6) 1.047 0.045 (1,14) 0.045 (1,14) 0.035 (0,89) 0.035 (0,89) 0.010 (0,25) 12 13 14 15 16 18 17 11 10 8 9 7 5 4 3 2 0.020 (0,51) 0.010 (0,25) 6 1 28 26 27 19 21 b sq a sq 22 23 24 25 20 0.055 (1,40) 0.045 (1,14) 0.028 (0,71) 0.022 (0,54) 0.050 (1,27) notes: a. all linear dimensions are in inches (millimeters). b. this drawing is subject to change without notice. c. this package can be hermetically sealed with a metal lid. d. the terminals are gold plated. e. falls within jedec ms-004
important notice texas instruments incorporated and its subsidiaries (ti) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. all products are sold subject to ti?s terms and conditions of sale supplied at the time of order acknowledgment. ti warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with ti?s standard warranty. testing and other quality control techniques are used to the extent ti deems necessary to support this warranty. except where mandated by government requirements, testing of all parameters of each product is not necessarily performed. ti assumes no liability for applications assistance or customer product design. customers are responsible for their products and applications using ti components. to minimize the risks associated with customer products and applications, customers should provide adequate design and operating safeguards. ti does not warrant or represent that any license, either express or implied, is granted under any ti patent right, copyright, mask work right, or other ti intellectual property right relating to any combination, machine, or process in which ti products or services are used. information published by ti regarding third-party products or services does not constitute a license from ti to use such products or services or a warranty or endorsement thereof. use of such information may require a license from a third party under the patents or other intellectual property of the third party, or a license from ti under the patents or other intellectual property of ti. reproduction of information in ti data books or data sheets is permissible only if reproduction is without alteration and is accompanied by all associated warranties, conditions, limitations, and notices. reproduction of this information with alteration is an unfair and deceptive business practice. ti is not responsible or liable for such altered documentation. resale of ti products or services with statements dif ferent from or beyond the parameters stated by ti for that product or service voids all express and any implied warranties for the associated ti product or service and is an unfair and deceptive business practice. ti is not responsible or liable for any such statements. following are urls where you can obtain information on other texas instruments products and application solutions: products applications amplifiers amplifier.ti.com audio www.ti.com/audio data converters dataconverter.ti.com automotive www.ti.com/automotive dsp dsp.ti.com broadband www.ti.com/broadband interface interface.ti.com digital control www.ti.com/digitalcontrol logic logic.ti.com military www.ti.com/military power mgmt power.ti.com optical networking www.ti.com/opticalnetwork microcontrollers microcontroller.ti.com security www.ti.com/security telephony www.ti.com/telephony video & imaging www.ti.com/video wireless www.ti.com/wireless mailing address: texas instruments post office box 655303 dallas, texas 75265 copyright ? 2006, texas instruments incorporated

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